DATE: 08-22-2014 HOTFIX VERSION: 034
CCRID PRODUCT PRODUCTLEVEL2 TITLE
932528 CONCEPT_HDL OTHER Ability to handle reusemodule in soft reuse blocks.
1137838 FSP GUI Ability to add notes to the canvas
1274382 ALLEGRO_EDITOR OTHER Retaining rats at the end of the clines or vias
1283575 FSP DE-HDL_SCHEMATIC Force Schegen to use symbols from released library
1296331 CONCEPT_HDL COMP_BROWSER CSV export no longer works properly from Component Browser
1297855 F2B DESIGNSYNC ds -automode error
1298028 CONCEPT_HDL CREFER CreferHDL crashes
1299607 SIG_INTEGRITY OTHER AutoModel should generate ESpice models for illegal values
1299609 CONCEPT_HDL OTHER AutoModel should make an ESpice model for a 3 pin Capacitor
1302013 ALLEGRO_EDITOR EDIT_ETCH AiBT Crashes Allegro for nets having T points
1302209 SPIF OTHER Can't Export to Router and create a Specctra file.
1302242 F2B PACKAGERXL Packaging a hierarchical project does not create a full pstdmodeldat file
1302285 SCM CONN_SERVER DSCS-120: Failed to open file in write mode
1302310 ALLEGRO_EDITOR INTERFACES Need way to have user defined license packages win over Cadence products.
1302638 F2B PACKAGERXL Function swaps are not backannotated into the schematic
1303170 SIP_LAYOUT DIE_STACK_EDITOR Using Die Properties to move a die to the bottom side causes some entities to disacociate from the part
1303214 CONCEPT_HDL CORE DEHDL crashes
1303219 ALLEGRO_EDITOR COLOR The user preference variable color_dlg_auto_apply changes the colors in the Display category
1303685 CONCEPT_HDL CORE DEHDL crashes when I save page 3
1303897 CONCEPT_HDL CORE Tool crashes intermittently when editing top-level schematic
1304656 APD PLATING_BAR Add Plating Bar command convert the Clines having Arcs to 45 Degree segments
1306467 CONCEPT_HDL CORE Concepthdl crashes during model assignmnt